ISR latency will be terrible if every interrupt starts with an XIP cache miss and a page load from the QSPI flash. We should put the Vector Table in RAM. It also allows us to hook things at run-time, e.g. to load drivers.
ISR latency will be terrible if every interrupt starts with an XIP cache miss and a page load from the QSPI flash.
We should put the Vector Table in RAM. It also allows us to hook things at run-time, e.g. to load drivers.