Issues

• [Bug] Synchronous exception is incorrectly counted in minstret

  SonalPinto/kronos#39 · Filter by author huntersubmit opened on Oct 29, 2026

• [Formal finding KRO-RTL-009] A CSR write to mcycle/minstret (low half) discards a pending carry into the upper half, permanently corrupting mcycleh/minstreth by -1

  SonalPinto/kronos#38 · Filter by author StandardAsh opened on Sep 18, 2026

• [Formal finding KRO-RTL-006] mepc and mcause have no reset value and no read-side masking, so after reset mepc[1:0] can read non-zero and mcause is undefined

  SonalPinto/kronos#37 · Filter by author StandardAsh opened on Sep 18, 2026

• [Bug report] Interrupt taken out of WFI sets mepc to the WFI's own PC, so MRET re-executes the WFI

  SonalPinto/kronos#36 · Filter by author StandardAsh opened on Sep 12, 2026

• [Bug report] mip is gated by mstatus.MIE and mie.*: wrong mip readback, WFI that never resumes, and interrupts taken after MIE is cleared

  SonalPinto/kronos#35 · Filter by author StandardAsh opened on Sep 12, 2026
  1

• [Bug Report] Kronos does not trap on CSR write access to Performance Counter (hpmcounter3–hpmcounter31)

  SonalPinto/kronos#26 · Filter by author YzhDDDing opened on Dec 29, 2025

• [Bug Report] Kronos does not raise Illegal Instruction on CSRRS writes to read-only Machine CSRs

  SonalPinto/kronos#25 · Filter by author YzhDDDing opened on Dec 29, 2025

• [Bug Report] Missing Forwarding Path for Shift Instructions

  SonalPinto/kronos#24 · Filter by author YzhDDDing opened on Dec 27, 2025

• [Bug Report] Missing Illegal Instruction Exception when accessing unimplemented H-extension CSR (mtval2)

  SonalPinto/kronos#23 · Filter by author YzhDDDing opened on Dec 27, 2025

• [Bug] RAW Hazard: Forwarding logic failure between lui and addi sequence

  SonalPinto/kronos#22 · Filter by author YzhDDDing opened on Dec 11, 2025
  2

• [BUG] Incorrect Data Forwarding Logic causing Stale Data Usage (WAW + RAW Hazard)

  SonalPinto/kronos#21 · Filter by author YzhDDDing opened on Dec 2, 2025

• [Bug] CSR counter writes do not trigger illegal-instruction exceptions

  SonalPinto/kronos#20 · Filter by author canxin121 opened on Nov 24, 2025

• Kronos LUT usage

  SonalPinto/kronos#18 · Filter by author MrJake222 opened on Apr 10, 2025

• Control-flow hijacking vulnerability: Wrong register data is used

  SonalPinto/kronos#17 · Filter by author KatCe opened on Aug 20, 2024

• Information Leakage Vuneratbility - via Memory

  SonalPinto/kronos#16 · Filter by author Mengyuan410 opened on Jul 31, 2024
  1

• Information Leakage Vulnerability

  SonalPinto/kronos#15 · Filter by author Mengyuan410 opened on Jul 31, 2024
  1

• [Bug report] Unexpected Behavior When Executing Instructions on Non-existent CSRs

  SonalPinto/kronos#14 · Filter by author youzi27 opened on Mar 26, 2024

• Execution time depends on a data value passed to an addi instruction

  SonalPinto/kronos#13 · Filter by author KatCe opened on Dec 21, 2023

• Unexpected manipulation of mtvec register

  SonalPinto/kronos#12 · Filter by author KatCe opened on Dec 20, 2023

• [Bug report] Kronos overcounts the retired instructions

  SonalPinto/kronos#10 · Filter by author flaviens opened on May 15, 2023

• [Bug report] Processor does not throw an exception when writing to a non-existent CSR

  SonalPinto/kronos#9 · Filter by author flaviens opened on Apr 30, 2023

• Bug report: Reading existent CSRs cause the CPU to hang in some microarchitectural conditions

  SonalPinto/kronos#8 · Filter by author flaviens opened on Apr 30, 2023

• [Bug report] Processor hangs shortly after reading a non-existent CSR instead of throwing an exception

  SonalPinto/kronos#7 · Filter by author flaviens opened on Apr 26, 2023

• Bug report: stale register value in case of double write

  SonalPinto/kronos#5 · Filter by author flaviens opened on Feb 23, 2023
  2

• Linux support

  SonalPinto/kronos#2 · Filter by author JOHNTBIJU opened on Nov 6, 2021
  1