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feat(ase): freeze checkpoints and reuse neighbor searches - #6085
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Add DP(..., freeze=True) for PT DPA4/SeZM checkpoints and graph-eligible
PT-expt models. Determine eligibility from the loaded model and selected
head, release the eager instance, export <stem>-ase_single.pt2 beside the
checkpoint, and load the resulting AOTInductor artifact. Other model
families and already frozen files retain their existing loading paths.
Each opted-in calculator construction rebuilds the artifact; callers can
load the resulting .pt2 directly to reuse it.
Reuse the existing backend freeze entry points and kernel policies:
- CUDA DPA4 defaults to DP_CUDA_INFER=1 and DP_TRITON_INFER=2, while
explicit environment settings take precedence.
- DPA4C graph export retains its required CUDA inference level of 2.
- Add an optional with_comm argument to the exporters, defaulting to True
for existing callers. ASE passes False, compiles only the regular
artifact, and records has_comm_artifact=False.
- Preserve multi-task head selection and normalize single-task PT heads
to None, matching the eager loader's treatment of head arguments.
Keep freeze=False as the default. Eligible checkpoints log a warning that
direct inference can be SUBSTANTIALLY slower and recommend automatic or
manual freezing. Document the eager path as useful for debugging and short
runs that avoid the initial compilation overhead.
Validation runs:
- 44 checkpoint, head-selection, kernel-policy, and export-policy checks.
- 43 CPU export and compatibility checks, including single-artifact ASE
parity and preservation of the default communication artifact.
- 2 existing ASE calculator tests, including frame/atomic parameters.
- 5 real CUDA export/ASE round trips: PT SeZM/DPA4 and PT-expt DPA4,
DPA4C, DPA1, and DPA2. Check energy, forces, stress, artifact reload,
unchanged checkpoints, and exactly one compilation per ASE export.
- Real dpa4c-air-v20260911 checkpoint: automatic export, numerical parity,
artifact reload, and absence of the communication artifact verified.
- Repository pre-commit checks passed.
Preset dpa4c-air-v20260911 benchmark (float32, vacuum_ref enabled):
NVIDIA RTX PRO 6000 Blackwell Server Edition, one GPU, PyTorch 2.13.0+cu130.
Use three OMat24 validation structures and periodic supercells. Each mode
runs 20 warmup steps and five timed blocks of 40 steps, alternating mode
order. Change coordinates on every step to invalidate the ASE cache and
synchronize the GPU around each block. Report median end-to-end ASE force
evaluation time, including neighbor construction and data transfers;
initialization, compilation, and warmup are excluded. Inference environment
overrides are unset, so both modes use their default execution policies.
Atoms Eager ms/step Frozen ms/step Speedup
16 15.85 4.54 3.49x
64 16.23 4.63 3.51x
128 16.35 4.68 3.50x
1024 17.20 5.91 2.91x
8192 24.17 11.86 2.04x
In the benchmark process, eager initialization took 4.38 s, automatic
freezing and loading took 50.91 s, and reloading the generated .pt2 took
0.26 s. Maximum frozen/eager differences across the sampled configurations
were 4.47e-7 eV/atom in energy,
1.67e-5 eV/Angstrom in force components, and 2.91e-8 eV/Angstrom^3 in stress.
The source checkpoint remained unchanged.
feat(pt-expt): compress checkpoints during freeze
Add --compress to the pt-expt freeze command and compress=True to its
Python entry point. Share the model compression and export pipeline with
the existing compress command, including neighbor-distance handling and
default table settings. Build the compressed model before export without
first compiling an intermediate uncompressed artifact.
Fold vacuum references before specializing charge-dependent tables.
ASE freeze=True requests compression for supported DPA4C models. A shared
eligibility check supplies both explicit compression errors and automatic
fallback reasons: unsupported precision, excluded type pairs, unsupported
compiled profiles, and missing initial charge states. Automatic compression
logs a warning and retains ordinary freezing when unsupported; explicit
--compress reports the error. Other model families retain their existing
ASE export behavior.
Reuse the exporter's kernel policy and lower-schema selection: eligible
CUDA models use the compact canonical ABI, CPU models use the graph ABI,
and ASE still omits communication artifacts. Respect PyTorch's dispatch
contract by leaving CompositeImplicitAutograd operators to their
decompositions instead of registering independent fake/Meta kernels.
Validation:
- 57 focused checks passed, covering CLI dispatch, shared compression,
vacuum folding, automatic fallback, explicit errors, head and kernel
policies, fake-op registration, and the existing SE compression command.
- Actual float64 ASE fallback export and numerical parity passed.
- Actual compressed CPU and CUDA ASE exports passed energy/force/stress
and reload comparisons, with compression operators present in the
exported graphs and exactly one compiled artifact per export.
- A trained dpa4c-air-v20260911 checkpoint passed CPU/CUDA automatic
compression, parity, artifact reload, and checkpoint-integrity checks.
- Repository pre-commit checks passed.
Preset dpa4c-air-v20260911 benchmark: float32 with vacuum_ref enabled,
PyTorch 2.13.0+cu130, inference environment overrides unset. Compare ordinary
frozen artifacts with compressed frozen artifacts using the same OMat24
validation structures and periodic supercells. Change coordinates each
step to invalidate ASE caching and alternate execution order. Timings are
median end-to-end ASE force evaluations, including neighbor construction
and transfers; export and warmup are excluded.
CUDA: one NVIDIA RTX PRO 6000 Blackwell Server Edition, 20 warmup steps,
five blocks of 40 steps, with GPU synchronization around each block.
Atoms Frozen ms/step Compressed ms/step Speedup
16 4.67 3.64 1.28x
64 4.73 3.70 1.28x
128 4.82 3.75 1.28x
1024 6.03 4.99 1.21x
8192 12.00 6.19 1.94x
CPU: Intel Xeon Platinum 8558P, OMP_NUM_THREADS=1 and one PyTorch compute
thread, 10 warmup steps and three blocks of 20 steps.
Atoms Frozen ms/step Compressed ms/step Speedup
16 41.66 1.55 26.91x
128 64.57 6.67 9.68x
1024 242.45 44.86 5.40x
Maximum compressed/eager differences across these samples:
- CUDA: energy 5.66e-7 eV/atom, force components 1.78e-5 eV/Angstrom,
stress 7.25e-8 eV/Angstrom^3.
- CPU: energy 6.29e-7 eV/atom, force components 1.43e-5 eV/Angstrom,
stress 6.54e-8 eV/Angstrom^3.
Compressed export and loading took 26.60 s on CUDA and 13.60 s on CPU in
these benchmark processes. Compression trades artifact size for evaluation
speed: the CUDA artifact grew from about 15 MiB to 145 MiB with its frozen
tables. The checkpoints and previous exported artifacts were preserved.
ASE repeatedly evaluates one structure, but inference rebuilt neighbor-search
state and passed graph data through redundant input adapters. Compressed
DPA1/DPA4C kernels made that preparation a substantial fraction of each step.
Expose the search controls at the calculator boundary and share persistent
strategies across PT, PT-expt and their supported exported input schemas.
Neighbor-search policy and cache ownership:
- Forward neighbor_graph_method and neighbor_skin through DeepPot, including
the reload after automatic checkpoint freezing. ASE defaults to a 1.0
angstrom skin; direct DeepEval callers retain a zero-skin default.
- Prefer Vesin for single-frame CUDA graph inference and Toolkit-Ops for
multi-frame CUDA batches. Preserve the native CPU graph search, explicit
backend choices and the fallback when optional dependencies are absent.
- Share the extended/edge-vector strategy factory between PT and PT-expt.
Configure SeZM/DPA4 inference inside its geometry stage so native forward
and compiled core execution remain intact. Training keeps its own policy.
- Keep one Vesin calculator per frame and reuse search storage and Verlet
candidates. Refresh geometry and enforce the exact model cutoff on every
evaluation, rebuilding candidates when required by motion, cell or atom
count changes. Copy search results to preserve earlier autograd graphs.
- Cache ASE element-to-model type mappings and invalidate them when atomic
numbers, atom order or type_dict change.
Graph and input preparation:
- Construct compressed DPA1/DPA4C canonical inputs directly from Vesin
displacement vectors. Build destination-major payloads and both CSR views
with uint32 source/order arrays, float32 geometry and the required guard
storage for fewer than two physical edges. Avoid the generic graph
conversion and its tensor-value reads on the host.
- Use PyTorch destination sorting on CUDA instead of Vesin sorting. Preserve
differentiable coordinate/cell geometry in generic graph construction,
compute the virtual-endpoint selection once, and reuse the known
destination ordering of NV output where exclusion semantics permit it.
- Avoid per-edge cell replication and frame-offset work for one frame, and
pass a single edge-vector frame through without concatenating its arrays.
- Centralize graph input packing for ordinary and native-spin inference,
preserving the distinct generic/canonical ABIs, optional fitting inputs
and compressed charge-state handling. Keep generic conversion available
for other neighbor builders and pair-excluded graphs.
Correctness and compatibility:
- Make local spin samples contiguous before PT edge-vector export so traced
frame strides are independent of ghost storage and work for batched input.
Regenerate affected native-spin edge-vector exports to use these strides.
- Restrict the Vesin CUDA empty-cache workaround to the exact known pointer
error with skin enabled. Accept an uncached retry only for an empty result;
unrelated errors and nonempty retries still raise the original exception.
- Stage PTE archive loading on CPU at both inference and serialization
boundaries. PyTorch 2.13 constructs a storage wrapper without an explicit
device; the scoped context prevents accidental default-device placement
while preserving the tensor devices recorded in the archive.
- Require both vesin and vesin-torch >= 0.6 for supported PyTorch targets.
Keep older PyTorch targets and macOS x86_64 on native neighbor construction.
- Document calculator controls, cache invalidation and supported input
schemas in the public ASE guide.
Validation:
- 53 graph utility checks passed on CPU/CUDA, covering dual CSR, zero/one
edges, empty systems, virtual atoms, multiple frames, periodic geometry,
cache updates, output lifetime, gradients and empty/nonempty transitions.
- 28 CPU inference checks and 13 CPU edge/neighbor checks passed; 15
CUDA-conditional cases were skipped in those CPU runs. Three compressed
charge-state route checks passed on CUDA.
- All 22 frame/atomic-parameter and spin-parameter checks passed after the
archive-loading fix, resolving the 13 prior initialization errors.
The new default-device regression passed on CPU and CUDA under both
meta and invalid-CUDA defaults; both cases failed before the fix.
- 120 real exported-model comparisons passed across ordinary/compressed Air,
DPA1 canonical and DPA4C native-spin canonical inputs, including multiple
frames, isolated/padded atoms and periodic/nonperiodic configurations.
- All 24 paired MD initial-state comparisons passed. The maximum force
difference was 1.074e-5 eV/angstrom and the maximum energy difference was
1.202e-7 eV/atom. Ruff and whitespace checks passed.
Measured graph-preparation impact with public preset models:
- Hardware: RTX PRO 6000 Blackwell Server Edition and Xeon Platinum 8558P;
PyTorch 2.13.0+cu130, one CPU thread, identical frozen artifacts.
- Full ASE NVE steps at 1 fs, 300 K initial velocities, 20 warmup steps and
100 timed steps per run; three alternating before/after repetitions.
Compilation, loading and warmup are excluded. Shared-host load varied.
- The reference already uses cached Vesin searches, so this comparison
quantifies the graph/input preparation changes within the shared design.
- Median milliseconds per step, 512 / 8000 atoms:
preset Mini, ordinary: 9.16 -> 9.22 / 92.56 -> 92.50
preset Air, ordinary: 6.67 -> 5.81 / 36.50 -> 32.60
preset Air, compressed: 4.22 -> 2.61 / 10.04 -> 4.69
- Compressed Air improves by 1.62x / 2.14x. Mini shows no stable end-to-end
improvement. For compressed Air at 8000 atoms, the measured ranges are
8.33-10.11 ms before and 3.58-5.06 ms after; these are workload-specific
results under the observed shared-host load.
Full ASE optimization and deployment scaling with public presets:
- The before/after labels below compare the parent of this change with the
full ASE optimization. The cached-search experiment above isolates graph
preparation within the shared design.
- Hardware: one RTX PRO 6000 Blackwell Server Edition GPU per run and
Xeon Platinum 8558P CPUs; PyTorch 2.13.0+cu130, TF32 disabled and one
MPI rank for LAMMPS.
- Diamond carbon with identical coordinates and 300 K initial velocities;
NVE with a 1 fs timestep, 20 warmup steps and 100 timed steps, repeated
three times. Report median complete MD throughput in atoms/s, rounded to
the nearest integer; export, compression, loading and warmup are excluded.
- Checkpoint rows use PT for DPA4 and PT-expt for DPA4C. Freeze rows use
uncompressed PT-expt .pt2 artifacts; freeze + compress rows use compressed
artifacts. Each frozen artifact is shared across its frontend comparisons.
- Ordinary LAMMPS uses the allocated CPU thread count. Kokkos GPU execution
uses one LAMMPS host thread with the same CPU allocation and DeePMD intra-op
limit. Kokkos rows use device MD/neighbor-list execution and the shared
PT-expt frozen model.
DPA4 preset Mini: 8 physical CPU cores per run, 512 / 3136 / 9680 atoms.
Independent runs execute concurrently on separate GPUs and disjoint CPU
cores local to each GPU. All variants in a repetition use the same GPU.
Median throughput (atoms/s):
Variant 512 3,136 9,680
ASE .pt before 13,188 17,505 18,214
ASE .pt after 13,480 18,500 18,479
ASE freeze before 56,141 77,661 80,307
ASE freeze after 65,248 85,011 87,357
LAMMPS freeze 76,718 87,101 87,988
LAMMPS Kokkos freeze 75,165 87,353 88,945
DPA4C preset Air: 24 physical CPU cores local to the GPU per run;
512 / 3136 / 9680 / 49248 atoms. All runs execute serially.
Median throughput (atoms/s):
Variant 512 3,136 9,680 49,248
ASE .pt before 29,867 93,962 116,377 118,342
ASE .pt after 32,049 110,497 122,495 120,628
ASE freeze before 83,740 175,846 230,227 239,501
ASE freeze after 117,170 220,846 252,397 249,470
ASE freeze + compress before 113,548 456,463 1,052,187 1,510,584
ASE freeze + compress after 253,795 1,268,573 2,199,040 2,698,941
LAMMPS freeze 156,523 198,797 203,997 180,545
LAMMPS Kokkos freeze 169,509 247,170 269,813 269,648
LAMMPS freeze + compress 310,375 794,813 927,621 753,016
LAMMPS Kokkos freeze + compress 585,428 2,836,777 4,239,738 6,439,693
All 54 Mini and 120 Air initial energy/force/stress comparisons passed.
Across these matrices, the maximum initial force difference is
1.848e-5 eV/angstrom and the maximum energy difference is 5.886e-7 eV/atom.
Model, exported-artifact and runtime-library hashes were verified.
Share tiny SeZM configurations without importing another backend test package and its process-global thread/device initialization. Limit synthetic CUDA detection to entering the real export policy context so lazy canonical imports retain the actual backend query and subsequent CPU exports remain independent.
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Actionable comments posted: 1
- 🪄 Fix comments: Fix CodeRabbit comments on this PR
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Inline comments:
Review comments at @deepmd/calculator.py:
- Around line 230-243: Update the `freezer` call in the `freeze` branch to write
to a unique temporary artifact in the same directory, then atomically replace
`output` with the completed artifact before loading it with `DeepPot`. Ensure
the temporary artifact is cleaned up if freezing or replacement fails.
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📒 Files selected for processing: 36
backend/find_pytorch.pydeepmd/calculator.pydeepmd/dpmodel/utils/neighbor_graph/from_ijs.pydeepmd/dpmodel/utils/neighbor_list.pydeepmd/main.pydeepmd/pt/entrypoints/freeze_pt2.pydeepmd/pt/infer/deep_eval.pydeepmd/pt/model/model/sezm_model.pydeepmd/pt_expt/entrypoints/compress.pydeepmd/pt_expt/entrypoints/main.pydeepmd/pt_expt/infer/deep_eval.pydeepmd/pt_expt/kernels/dpa4c/graph_compress.pydeepmd/pt_expt/utils/auto_neighbor_list.pydeepmd/pt_expt/utils/canonical_graph.pydeepmd/pt_expt/utils/edge_schema.pydeepmd/pt_expt/utils/graph_builder.pydeepmd/pt_expt/utils/nv_graph_builder.pydeepmd/pt_expt/utils/serialization.pydeepmd/pt_expt/utils/tabulate_ops.pydeepmd/pt_expt/utils/vesin_graph_builder.pydeepmd/pt_expt/utils/vesin_neighbor_list.pydeepmd/pt_expt/utils/vesin_search.pydoc/model/dpa4c.mddoc/third-party/ase.mdsource/tests/common/sezm_config.pysource/tests/pt/model/test_nlist_backend.pysource/tests/pt/model/test_sezm_export.pysource/tests/pt/model/test_sezm_vacuum_freeze.pysource/tests/pt_expt/infer/test_deep_eval.pysource/tests/pt_expt/infer/test_deep_eval_pt_checkpoint.pysource/tests/pt_expt/test_calculator.pysource/tests/pt_expt/test_freeze_compress.pysource/tests/pt_expt/utils/test_canonical_graph.pysource/tests/pt_expt/utils/test_serialization_kernel_levels.pysource/tests/pt_expt/utils/test_tabulate_ops_lazy.pysource/tests/pt_expt/utils/test_vesin_graph_builder.py
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CI-backed follow-through at exact head 946fbae02d77d04e547846850c5a76216c39c272.
The now-completed Python workflow fails in three shards. Two failures are unchanged regression expectations that were not updated with intentional behavior/message changes; the third is the new real float64 ASE fallback-export test encountering CPU Inductor code generation on the repository-pinned PyTorch 2.11.0 stack. The inline findings are limited to those integration blockers. The compiler diagnostic is not evidence of incorrect energies/forces or proof that this PR introduced the underlying compiler defect.
I checked the exact source/test changes, actual CI job logs, and existing reviews before posting. The two stale expectations were also reproduced with exact-source AST/availability doubles; I did not run local PyTorch/AOTI or GPU tests. The already-reported shared-output artifact race is not duplicated here.
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The fan-out review found no >=80-confidence code issues — the deep_eval input-packing refactor was traced slot-by-slot against the old ABI and is behavior-preserving, and the 7 sub-threshold findings are usability notes (two inline below, non-blocking). What blocks this PR is CI: three test failures, two of them deterministic regressions introduced here, all inline.
Current state: 39 pass / 5 fail / 5 skipping (skips are the usual release/GPU gates, same profile as recently merged PRs). The 5 fails are the three Test Python shards below, the all-green aggregator, and RTD — the RTD build shows as CANCELLED on their API, which is infrastructure; it needs a rebuild but is not obviously a content problem.
CI-1 and CI-2 are one-line stale-test updates: this PR changed production behavior/messages without updating the pre-existing tests that pin them. CI-3's new test performs a real AOTI compile with no environment guard and cannot pass on the CI image (no OpenMP). Please address all three; the two non-blocking usability notes are optional.
Keep automatic exports in private evaluator-owned directories and publish separate complete copies atomically. Preserve the previous public artifact on failure, selected heads across concurrent processes, and later evaluator serialization after another export or public-file overwrite. Restrict PyTorch 2.11 CPU inference horizontal fusion to avoid a gather reusing a scatter index array before its declaration. Keep SIMD and vertical fusion enabled and retain real float64 export and numerical checks. Reject freeze --compress for unsupported backends, provide an actionable compression command when neighbor statistics are absent, and align the existing dispatch and nlist-message tests with their intended behavior. Validate artifact lifetime, deterministic concurrent publication, failure cleanup, CLI handling, compiler options, and actual CPU freeze/reload parity. Validation: PyTorch 2.13 CPU related suites 161 passed, 15 skipped; PyTorch 2.11 CPU AVX2 freeze/compression and compiler-option suites 23 passed. Scoped pre-commit hooks, repository Ruff, and whitespace checks pass.
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Corrective-delta review at exact head 5885aab7589d0f569b00c453be3d212c0b2a0fc5, following 946fbae02d77d04e547846850c5a76216c39c272.
The two stale regression expectations from my previous review are addressed: the single-frame CUDA auto-selection row now expects Vesin while the multi-frame NV case remains, and the nlist-artifact rejection test matches the actionable use nlist_backend message while retaining its default-loading check. Exact-source dispatch checks passed all nine rows.
The compiler mitigation targets the demonstrated failure instead of skipping it: PyTorch 2.11 inference receives cpp.max_horizontal_fusion_size=1, with SIMD, training policy and other releases unchanged. The real float64 ASE freeze/energy/force/stress regression remains intact. Across 96 exact-source old/new option comparisons, the only policy change was this intended inference/version gate. The author's reported 23 native PyTorch 2.11 CPU tests remain attributed to that report; my local checks did not run Torch or AOTInductor.
I also checked the artifact correction against loading and later serialization: each evaluator owns a private artifact, the public copy has a separate inode and is published atomically, and cleanup follows backend lifetime. Exact-constructor host doubles passed sequential ownership, 20 synchronized concurrent head pairs, public-overwrite isolation, retained evaluator/wrapper and cyclic-GC lifetime, plus export/load/copy/publication failure cleanup. These are filesystem/weakref checks, not concurrent compiler tests; the documentation correctly requires separate processes for concurrent export. The new unsupported-backend compression error and actionable statistics guidance are present; 55 stdlib argparse cases with backend-registry doubles passed.
No new defect was found in this bounded corrective delta. Current-head Python CI is still running, so the former native CPU export blocker is not yet independently cleared by hosted results. This scoped follow-up does not substitute for the requested human re-review or overall approval.
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With Vesin selected and ASE's default neighbor_skin=1.0, cell contraction can omit valid periodic neighbors. On CPU with Vesin 0.6.1, the one-atom rcut=6 example below returns four neighbors after contraction, while merge-base and uncached searches return six. Please rebuild candidates on cell changes and add this multi-image regression.
Retain each frame's calculator with an independent cell snapshot. Rebuild the frame's candidate search on cell or periodicity changes so cell contraction cannot introduce periodic images absent from the old candidates. Keep fixed-cell reuse and avoid cell comparisons when the skin is zero. Cover multi-image contraction for lattice shifts and displacement vectors, in-place cell updates, frame isolation, fixed-cell reuse, and PBC transitions. Correct the default neighbor-builder expectation for CUDA/NV without Vesin and exercise the availability policy through the real strategy factory. Validation: 87 CPU tests and 38 subtests passed; 26 conditional tests skipped. The two contraction regressions fail before the fix and pass afterward. Scoped pre-commit hooks, repository Ruff, and whitespace checks pass.
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Reviewed only the 5885aab → 7d57390 review-fix delta and necessary cache/factory context. The reported periodic-cell contraction defect is addressed in source: each frame now owns an independent detached cell snapshot; changed cell values or periodicity reconstruct that frame's calculator, while identical cells keep reuse. Cloning the snapshot detects in-place edits. The default-builder expectation now includes CUDA+NV and the strategy regression exercises the real factory with availability doubles.
The added real-Vesin regression checks the specific 2.35→1.95 cell contraction at cutoff6 (four→six images), both shifts and displacement vectors, fixed-cell reuse, frame independence and periodic/nonperiodic transitions. I independently ran eight bounded exact-source invalidation controls using tensor/neighbor doubles, covering those state transitions, cutoff changes and the skin-zero path; all passed. This local environment has neither PyTorch nor vesin-torch, so those controls are not a reproduction of geometric neighbor counts. The author's 87-test/38-subtest CPU result is existing qualification evidence, not a suite I reran.
No new actionable defect found in the delta. CUDA cell comparison synchronizes the rebuild decision; GPU execution and overhead of this change remain unmeasured, as disclosed. CI is still running. Review only; no code changes or merge actions.
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With skin configured at construction, the original contraction regression now returns all six neighbors on CPU and CUDA at 7d57390. Fixed-cell reuse and per-frame invalidation are preserved, and the optional-backend expectation is corrected. Changing cells deliberately rebuilds candidates; full ASE/MD performance has not been remeasured.
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Approve at unchanged head 7d57390, following my existing corrective-delta reviews (5596720429 and 5570005968). The previously reported stale expectations, CPU export/compiler policy and artifact ownership issues are addressed, and the periodic-cell contraction fix is source-LGTM. Current-head Python and C++ workflows now pass. No new commits or actionable review findings have appeared since the reviewed fix.
I am reusing the qualification already recorded rather than duplicating the same-head review: my bounded exact-source controls, the author's 87-test/38-subtest CPU result, and iProzd's subsequent actual CPU/CUDA contraction regression (5598883821) recovering all six neighbors. The latter also verifies fixed-cell reuse and per-frame invalidation. I did not independently rerun native CUDA or the full ASE/MD performance matrix; the synchronization overhead on changing cells remains unmeasured. This approval is not a new performance claim. Review only; no merge actions.
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Agent: dot Reference correction to my approval above: the earlier corrective-delta review is 5569997776, not the mistyped 5570005968. The approval and its validation scope are unchanged. |
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The ASE freezing and neighbor-search changes are useful, but I am requesting changes for two automatic-freeze integration issues: native SeZM neighbor truncation and reloading older compiled checkpoints without key normalization. The two additional regression-test comments are non-blocking suggestions and should not hold up merging once the blocking issues are addressed.
Reviewed commit: 7d57390482706e949dbbe4700e080fce5c2e4c47. The findings are based on source inspection; no local runtime reproduction was performed.
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Correction to my earlier approval (5601787155): I independently checked the newly raised automatic-freeze integration findings in review 5603257071, and am changing my assessment to changes requested at the same exact head 7d57390. These are distinct from the already-fixed periodic-cell contraction issue, whose qualification remains valid.
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Confirmed the native SeZM edge-set mismatch. The eager self-built SeZM path requests all-cutoff edges from its selected builder. With freeze=True and nlist_backend='native', the reloaded edge_vec artifact has no accelerated builder and routes through dpmodel.utils.nlist.build_neighbor_list with fixed sum(sel), then converts that truncated list to edges. Executing the unchanged dense-builder function through a thin NumPy Array API adapter for three mutually close atoms, rcut=2 and sel=[1,0] yields 3 directed neighbors versus 6 all-cutoff neighbors. This is a bounded builder-level reproduction, not a native frozen energy/force comparison.
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Confirmed the compiled-checkpoint key incompatibility. I executed the eager loader's exact normalization block: model.Default.original_model.weight becomes model.Default.weight and compiled_forward_lower constants are dropped. The automatic freezer instead reloads the unnormalized raw state into ModelWrapper with strict load_state_dict (both single- and multi-head branches). The raw keyset therefore lacks the expected plain key and has unexpected wrapper/compiler keys. This validates the source-level strict-key mismatch; I did not run a real compiled checkpoint through PyTorch here.
The existing inline threads 4339579553 and 4339579568 already describe the repairs, so I am not duplicating them. Please address both before relying on my approval. I missed these integration paths in the earlier review. The two additional coverage suggestions remain non-blocking; no new GPU/performance or native end-to-end validation is claimed.
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Incremental review of 681663b → 71506e0: source LGTM for the one-test repair. The four explicit availability combinations now include NV-only CPU, matching make_neighbor_list's supported CPU/CUDA predicate. Patching the probes in auto_neighbor_list controls the names actually read by dispatch, while DeepPot construction/PTE loading remain real; no neighbor numerical output is mocked or newly claimed. Production dispatch and the broader previously reviewed inference tests are unchanged.
This resolves the existing stale AUTO expectation finding without duplicating it. The author's reported 10 CPU tests/34 subtests are reused as reported evidence; I did not execute Torch/NV/CUDA locally. Current Python/C++/wheel CI is still running. Review-only; no branch or merge changes.
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The latest commit addresses the stale test_default_is_auto expectation: the four dependency combinations are now exercised with the correct mock target and expectations. Two non-blocking follow-ups are attached inline (a missing negative test for the nv backend and a docstring that does not match the edge-vector behaviour).
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Two findings from the re-review at f3268b7: the type-mapping cache test is tautological, and the float64 eager-vs-export comparison uses a float32-grade tolerance.
…epmodeling#6110) ## Summary This PR speeds up compressed DPA4C models in LAMMPS on CUDA (pt-expt backend, `pair_style deepmd/kk` and `dpa4spin/kk`). It rebuilds the inference path from the Kokkos graph build to the force epilogue, derives its launch choices for the Tesla V100, L20 and H20 as well as the RTX PRO 6000 Blackwell it was developed on, and extends the compact canonical schema to multi-task branches with a shared fitting network and to graphs whose node count exceeds the 32-bit index range. The fp32 contract of the model is kept throughout. Every change either leaves every output unchanged bit for bit, or reorders a floating-point sum by design and is checked against the uncompressed model in fp32 and fp64. No reduced-precision arithmetic (TF32, bf16, fp16, split precision) is used. Forces are now assembled in 64-bit fixed point, so they no longer depend on the scheduling order and runs are reproducible. ## Measured speedups All timings are LAMMPS step times against the parent build with the same frozen models; each commit message gives the conditions and the number of runs per point. RTX PRO 6000 Blackwell (sm_120), the five v20260911 grades (Nano to Plus), ratio of old to new step time: | System | 512 atoms | 10,296 atoms | 100,800 atoms | | --- | --- | --- | --- | | diamond carbon | 3.5-4.9x | 2.5-2.9x | 2.0-2.9x | | B, C and N at random on the same sites | 3.5-5.1x | 2.4-2.7x | 1.9-2.6x | | five elements at random (frozen geometry) | - | 2.5-3.5x | 1.9-2.7x | | native spin, Newtonian NVE | 3.5-5.3x | 2.3-2.7x | 1.8-2.8x | The largest system that one device runs grows from 14.05 to 22.43 million atoms, and the throughput above one million atoms grows by 2.6-3.0x. Per-GPU tuning, change of the step at 10,296 / 100,800 atoms of diamond carbon relative to the sm_120-tuned build: - V100: Nano -21.0 / -25.9%, Mini -25.2 / -36.8%, Air -4.9 / -6.1%; native-spin Nano -21.5 / -24.6% - H20: Nano -3.2 / -3.9%, Neo -5.1 / -2.5%, Air -3.7 / -1.5%; native-spin Neo -8.2 / -4.3% - L20: Nano -3.8 / -0.0%; the other grades within 0.3% Where the freeze-time measurement departs from the rules, the step takes up to 11% less time again (Neo at 6,160 atoms on the L20: -11.2%; Plus at 720 atoms on the H20: -9.3%). A frozen branch of a multi-task DPA4C with a shared fitting network now reaches the fused path: the OMat24 branch of the two-branch OpenLAM DPA4C Mini takes 0.151 / 0.449 / 2.905 ms per step on diamond carbon at 512 / 10,296 / 100,800 atoms, against 1.133 / 1.504 / 10.19 ms before (3.1-7.7x, similar on B/C/N). Several ranks without a GPU-aware MPI: on three RTX PRO 6000 GPUs, Nano at one million atoms takes 6.8 ms per step with a CUDA-aware Open MPI, 11.3 ms with MPICH and the device fold of this PR, and 13.8 ms with the host path of LAMMPS, against 15.2 ms on one GPU. ## Commits The five commits are self-contained and are easiest to review one at a time; each message records its design and its measurements. 1. **perf(dpa4c): accelerate compressed DPA4C inference on CUDA in LAMMPS** (the core) - Kokkos graph build: one pass fills every row of the compact canonical graph (cp.async staging of the neighbor lists, fixed-point squared-distance keys, warp sorts, decoupled look-back for the output offsets). The edge storage is sized by the candidate count, so the edge count never leaves the device and the per-step readback and synchronization disappear. - Model replay: the evaluation of a graph without halo nodes is captured once into a CUDA graph and replayed, keyed by the addresses and extents of its inputs. A per-instance mutex serializes the runs of a model, a failed capture turns capturing off for that model, and a step that requests the per-atom virial evaluates eagerly. - Fused energy-force operator: prologue and epilogue kernels derive the ownership mask, frame offsets and segment sums inside the operator; the edge backward assembles the force directly in 64-bit fixed point (2^-32 eV/A); a frame with a non-finite energy or virial or an out-of-range force contribution reports NaN forces. - Edge scans: rows of small systems are shared among 2, 4 or 8 warps; wide profiles co-schedule 16-24 rows per block in lockstep windows of bond length; one node type takes folded scans, two to eight types take slotted scans with 4 or 8 per-type slots; a low-rank radial table is adopted at compression only where it reproduces every channel and its radial derivative at the knots to 1e-8; bond vectors are prefetched into L2. Generated shards (`shard.cu.in`) replace `graph_compress_c*.cu`. - Fused fitting network: one kernel carries a node panel through every hidden layer, the energy head and the input-gradient backward, bitwise equal to the per-layer kernels; small runs split a panel over a thread-block cluster. 2. **perf(dpa4c): tune compressed DPA4C CUDA inference for V100, L20 and H20** - The fitting route follows the fp32 ridge (peak FLOP rate over DRAM bandwidth) and the compute capability of the device. Freezing or compressing for a CUDA device times the fused shapes against the per-layer kernels with CUDA-graph replays and stores the departures from the rules with a fingerprint of the device; another device takes the rules. The measurement adds 15 s to 3 min to a freeze, and every route gives the same outputs bit for bit. - sm_70 register budgets; every launch choice follows from the device and the system, without environment overrides. - Without a GPU-aware MPI, `deepmd/kk` and `dpa4spin/kk` pack the ghost values on the device and stage only those through pinned host buffers, bit for bit as the host path. - dpmodel: integer indices are bounded with `maximum` instead of `clip`, which array_api_compat < 1.14 lowers to `isnan` on integers, an operation AOTInductor cannot compile. 3. **perf(dpa4c): deploy the per-GPU tuning on V100, L20 and H20** - The route measurement holds on boards at their power limit: bursts and long single-route trains, over samples of one and of several node types, and a route departs from the rules only where it wins both. - The shared Inductor options give kernels separate output buffers, which avoids a Triton 3.7.1 race in in-place reductions under warp replication. - The RUNPATH of the LAMMPS plugin also holds `$ORIGIN/..`, so `LAMMPS_PLUGIN_PATH` alone loads it. - Documentation: `pair_style dpa4spin` and its Kokkos variant in the LAMMPS command reference, when compression keeps a fitting kernel other than the default, and the CUDA support of Open MPI for runs on several GPUs only (it lengthens a small single-rank step by 10-18%). 4. **perf(pt_expt): fold the case embedding of a shared fitting network at export** - The constant one-hot case embedding of a deployed branch is folded into the bias of the first fitting layer, so the export, the launch tuners and the fused operators see a plain fitting network while `model.json` keeps the branch as trained. A first layer whose residual carries the case embedding past the activation keeps it, with a warning. 5. **feat(pt-expt): support automatic-width canonical graph indices** - Source indices are 32- or 64-bit by the node extent, while edge counts, CSR offsets and source-grouped edge positions stay int64. A byte-word carrier lets one exported canonical artifact accept either width without copying; the Kokkos producer gains 64-bit edge prefixes and source CSR. ## Interfaces and compatibility - Compressed DPA4C `.pt2` archives must be re-frozen: the schema of the fused operator and the source-word ABI of canonical artifacts changed. DPA4 archives keep loading. - C API version 31: `DP_DPA4ComputeCanonicalGraphGPU` and `DP_DPA4SpinComputeCanonicalGraphGPU` replace `DP_DeepPotComputeCanonicalGraphGPU` and `DP_DeepSpinComputeCanonicalGraphGPU` of versions 28 to 30, and take the graph virial, the caller's stream, the node positions and the MPI communicator. The new names are deliberate: a binary built against an earlier version fails to load instead of calling a function of another signature. - The backend plugin interface is version 2 (`deepmd_create_deeppot_backend_v2`, `deepmd_create_deepspin_backend_v2`); a version-1 plugin is refused at load. Binaries and plugins built against C API version 30 or backend interface version 1 must be rebuilt. - `DP_DeepPotHasLongRange`, `DP_DeepPotModelDeviHasLongRange` and `has_long_range()` on `DeepPot` and `DeepPotModelDevi`, together with the node-position and communicator arguments above, are the interface of a long-range module that a follow-up PR adds. No model in this PR has a long-range module, so these paths are inactive here; carrying them now avoids a second version bump of the C API and the plugin interface. ## Validation on this branch The branch is based on master 1ded5d2 and holds the five commits cherry-picked from the development branch. Against the commits validated there, the rebase changes no file under `source/api_c`, `source/api_cc`, `source/lib`, `source/lmp` or `source/op`. - One semantic conflict with deepmodeling#6085: its new test `test_compact_canonical_deep_eval` asserted the former `uint32` source carrier. The last commit updates it to the byte-word carrier (`uint8` with a word axis of 4 for a small graph) and the int64 `source_order`; the test failed before the update and passes after it. - pre-commit over the whole range: all hooks passed. - Local run on an RTX PRO 6000 Blackwell (PyTorch 2.13.0+cu130, CUDA 13.3): `source/tests/pt_expt/descriptor` 1611 passed and 81 skipped (the skips need the CPU operators or `DEEPMD_ENABLE_DPA1_HIGH_LMAX=ON`, which this build did not compile), apart from the test above. The other Python suites, the C++ suites and the LAMMPS tests were not rerun locally for this branch and are left to CI, including the `Test CUDA` jobs. The validation records in the commit messages (pytest and C++ suites, bitwise LAMMPS comparisons, fp64 accuracy checks, multi-rank runs) describe the development branch. <!-- This is an auto-generated comment: release notes by coderabbit.ai --> <!-- coderabbit-ai-generated:v1 --> ## Summary by CodeRabbit * **New Features** * Compact canonical graph inference now supports automatic-width indices, optional virial outputs, caller-provided streams, and long-range capability queries. * Added CUDA graph replay, fitting-route selection, low-rank radial-table compression, and optional source-CSR generation. * Compressed native-spin models can use the `dpa4spin` LAMMPS pair style, including Kokkos execution. * Eligible case embeddings can be folded into fitting networks during export. * **Bug Fixes** * Improved handling of optional compression artifacts and compiled inference buffers. * Long-range models now reject periodic boundaries during LAMMPS initialization. * **Documentation** * Updated installation, LAMMPS/Kokkos, MPI, spin-force, and backend-plugin compatibility guidance. <!-- end of auto-generated comment: release notes by coderabbit.ai -->
Summary
This PR combines two related ASE improvements: compiling eligible checkpoints at calculator construction, and reducing the neighbor-search and graph-preparation work performed on every evaluation. It also exposes single-pass PT-expt compression during freezing, which ASE selects automatically for supported DPA4C models.
The changes are rebased onto master after #6045, so automatic compression uses the shared model capability interface already present upstream. The ASE stress symmetrization from #5799 is retained.
To reuse the compiled artifact without compiling again:
Compression is also available directly:
dp --pt-expt freeze -c model.pt -o model.pt2 --compressCheckpoint freezing and compression
DP(..., freeze=True)for PT SeZM/DPA4 checkpoints and graph-eligible PT-expt checkpoints. Eligibility is determined from the loaded model and selected head, rather than from the file extension alone.<stem>-ase_single.pt2beside the checkpoint. Concurrent processes retain their selected heads and later serialization keeps reading the private artifact; failed export/loading/publication preserves the previous public copy. The last successful publication wins. The extra private copy is removed when its evaluator is collected. Backend compilation is process-concurrent, not thread-safe; reuse the public copy after concurrent exporters finish. Unsupported models and already-frozen files keep their normal loading behavior.None, matching the eager loader.with_commto the exporters with a backward-compatible default ofTrue. ASE passesFalse, compiles only the single-process artifact, and recordshas_comm_artifact=False.DP_CUDA_INFER=1andDP_TRITON_INFER=2, honoring explicit environment overrides; DPA4C retains its required CUDA inference level of 2.freeze=Falseas the default. Eligible checkpoints warn about the potentially slower eager path; that path remains useful for debugging and short runs that do not amortize compilation.--compress/compress=Trueto PT-expt freezing. The freeze and existing compress commands share the model-compression/export pipeline, including neighbor-distance handling and table defaults. Compression happens before export, without compiling an intermediate uncompressed artifact. Other backends rejectfreeze --compressduring argument parsing. When saved neighbor-distance statistics are missing, the error directs CLI users to freeze without compression and then usedp --pt-expt compress ... -t INPUT.json.--compress; automatic ASE compression logs the reason and continues with ordinary freezing. Other model families retain uncompressed export.CompositeImplicitAutogradoperators to their decompositions instead of registering conflicting independent fake/Meta implementations.Persistent neighbor searches and graph preparation
Search policy and cache lifetime
neighbor_graph_methodandneighbor_skinat the ASE boundary and forward them throughDeepPot, including the reload after automatic freezing. ASE defaults to a 1.0 angstrom skin; direct evaluator callers retain their zero-skin default.rcut + skin, rebuilding after sufficient displacement or changes to the cell/atom count. Every evaluation still refreshes geometry and enforces the exact model cutoff. Returned search data are copied so later evaluations cannot overwrite tensors needed by earlier autograd graphs.type_dictchanges.neighbor_skin=0.0disables candidate reuse.Compact graph inputs
uint32source/order arrays,float32geometry, and guard storage for zero or one physical edge.Compatibility and integration
tmp40C++ compilation failure while retaining SIMD and vertical fusion; training, CUDA kernel fusion, and other PyTorch versions keep their existing configuration. No export/parity test is skipped or replaced with a mocked compile.vesinandvesin-torch>= 0.6 on supported PyTorch targets. Older PyTorch targets and macOS x86_64 retain native neighbor construction without requiring these bindings.Validation
Cell-cache review validation (2026-10-21)
Review-fix validation (2026-10-19)
Rebased-branch validation
Validation uses Python 3.13, PyTorch 2.13.0+cu130, and Vesin / vesin-torch 0.6.1. CUDA runs use one RTX PRO 6000 Blackwell Server Edition GPU. Tests generate their own small models/artifacts; the benchmark matrices below were not rerun.
The full repository test suite and the historical performance/MD matrices were not rerun for this rebase. CPU-only runs skip CUDA-conditional cases; missing-dependency branches also skip when the optional dependency is installed.
Original development validation
The original two commit messages record the following development runs. These groups cover different stages and may overlap; they are not an aggregate test count or a claim that every run was repeated for this rebase.
dpa4c-air-v20260911checkpoint comparisons.1.074e-5 eV/angstromin force and1.202e-7 eV/atomin energy. The larger scaling matrices below additionally passed all 54 Mini and 120 Air initial energy/force/stress comparisons, with model/artifact/runtime-library hashes verified.Original performance measurements
The following results are reproduced from the original commit messages. They were measured during development, not rerun against the rebased branch. Each experiment has its own baseline; speedups from separate tables should not be multiplied. Timings exclude initialization/export/warmup unless explicitly stated and describe the measured workloads, not a universal performance guarantee.
Eager versus frozen ASE evaluation
Preset
dpa4c-air-v20260911, float32 withvacuum_refenabled, PyTorch 2.13.0+cu130, one NVIDIA RTX PRO 6000 Blackwell Server Edition GPU. Three OMat24 validation structures and periodic supercells were evaluated with 20 warmup steps and five timed blocks of 40 steps, alternating execution order. Coordinates changed every step to invalidate the ASE cache; GPU synchronization bracketed each block. The median timings include neighbor construction and transfers. Inference environment overrides were unset.Eager initialization took 4.38 s, automatic freezing/loading 50.91 s, and direct reload of the compiled artifact 0.26 s in that benchmark process. Maximum frozen/eager differences were
4.47e-7 eV/atomin energy,1.67e-5 eV/angstromin force components, and2.91e-8 eV/angstrom^3in stress. The source checkpoint was unchanged.Ordinary versus compressed frozen ASE evaluation
The same preset, precision, vacuum-reference setting, PyTorch version, OMat24 structures and supercells were used. Coordinates changed each step and execution order alternated. End-to-end force-evaluation timings include neighbor construction/transfers; export and warmup are excluded.
CUDA: one RTX PRO 6000 Blackwell Server Edition GPU, 20 warmup steps, five blocks of 40 steps, synchronized around each timed block.
CPU: Intel Xeon Platinum 8558P,
OMP_NUM_THREADS=1and one PyTorch compute thread, 10 warmup steps, three blocks of 20 steps.Maximum compressed/eager differences:
Compressed export/loading took 26.60 s on CUDA and 13.60 s on CPU in those processes. Compression increases artifact size: the measured CUDA artifact grew from about 15 MiB to 145 MiB because it contains frozen tables. Source checkpoints and earlier exported artifacts were preserved.
Isolated graph/input-preparation effect
RTX PRO 6000 Blackwell Server Edition and Xeon Platinum 8558P, PyTorch 2.13.0+cu130, one CPU thread and identical frozen artifacts. Complete ASE NVE steps used a 1 fs timestep, 300 K initial velocities, 20 warmup steps and 100 timed steps, with three alternating before/after repetitions.
The reference in this experiment already uses cached Vesin searches. It isolates the graph/input-preparation changes within that shared design, rather than comparing the complete PR with unmodified ASE.
Compressed Air improved by 1.62x / 2.14x at 512 / 8,000 atoms. Mini showed no stable end-to-end improvement. Shared-host load varied: compressed Air at 8,000 atoms ranged from 8.33–10.11 ms before and 3.58–5.06 ms after.
Complete ASE optimization and deployment scaling
Here, "before" means the parent of the neighbor/graph optimization commit and "after" includes that complete optimization. This is distinct from the isolated graph-preparation experiment above.
One RTX PRO 6000 Blackwell Server Edition GPU per run, Xeon Platinum 8558P CPUs, PyTorch 2.13.0+cu130, TF32 disabled, and one MPI rank for LAMMPS. All variants use diamond carbon with identical coordinates and 300 K initial velocities, NVE at 1 fs, 20 warmup steps and 100 timed steps, repeated three times. Values are median complete-MD throughput in atoms/s, rounded to integers; export, compression, loading and warmup are excluded.
Checkpoint rows use PT for DPA4 and PT-expt for DPA4C. Freeze rows use uncompressed PT-expt
.pt2artifacts; freeze + compress rows use compressed artifacts. Each frozen artifact is shared across its frontend comparisons. Ordinary LAMMPS uses the allocated CPU thread count. Kokkos uses device MD/neighbor-list execution with one host thread, the same CPU allocation and DeePMD intra-op limit, and the shared PT-expt model.DPA4 preset Mini: eight physical CPU cores per run. Independent runs execute concurrently on separate GPUs and disjoint GPU-local CPU cores; all variants in a repetition use the same GPU.
.ptbefore.ptafterDPA4C preset Air: 24 physical CPU cores local to the GPU per run; all runs execute serially.
.ptbefore.ptafterAll 54 Mini and 120 Air initial energy/force/stress comparisons passed. Across these scaling matrices, the maximum initial force difference was
1.848e-5 eV/angstromand the maximum energy difference was5.886e-7 eV/atom.Summary by CodeRabbit
New Features
Bug Fixes