Arm64-SVE: Add scheme for scalable SVE state in the CONTEXT record

src/coreclr/System.Private.CoreLib/src/System/Runtime/ExceptionServices/AsmOffsets.cs

@@ -26,9 +26,9 @@ class AsmOffsets
 #endif // TARGET_UNIX
 #elif TARGET_ARM64
 #if TARGET_UNIX
-    public const int SIZEOF__REGDISPLAY = 0x9f0;
-    public const int OFFSETOF__REGDISPLAY__SP = 0x938;
-    public const int OFFSETOF__REGDISPLAY__ControlPC = 0x940;
+    public const int SIZEOF__REGDISPLAY = 0x970;
+    public const int OFFSETOF__REGDISPLAY__SP = 0x8b8;
+    public const int OFFSETOF__REGDISPLAY__ControlPC = 0x8c0;
 #else // TARGET_UNIX
     public const int SIZEOF__REGDISPLAY = 0x950;
     public const int OFFSETOF__REGDISPLAY__SP = 0x898;
@@ -87,9 +87,9 @@ class AsmOffsets
 #endif // TARGET_UNIX
 #elif TARGET_ARM64
 #if TARGET_UNIX
-    public const int SIZEOF__REGDISPLAY = 0x9e0;
-    public const int OFFSETOF__REGDISPLAY__SP = 0x930;
-    public const int OFFSETOF__REGDISPLAY__ControlPC = 0x938;
+    public const int SIZEOF__REGDISPLAY = 0x960;
+    public const int OFFSETOF__REGDISPLAY__SP = 0x8b0;
+    public const int OFFSETOF__REGDISPLAY__ControlPC = 0x8b8;
 #else // TARGET_UNIX
     public const int SIZEOF__REGDISPLAY = 0x940;
     public const int OFFSETOF__REGDISPLAY__SP = 0x890;
@@ -144,7 +144,7 @@ class AsmOffsets
 #endif // TARGET_UNIX
 #elif TARGET_ARM64
 #if TARGET_UNIX
-    public const int SIZEOF__PAL_LIMITED_CONTEXT = 0x3e0;
+    public const int SIZEOF__PAL_LIMITED_CONTEXT = 0x3a0;
 #else // TARGET_UNIX
     public const int SIZEOF__PAL_LIMITED_CONTEXT = 0x390;
 #endif // TARGET_UNIX

src/coreclr/pal/inc/pal.h

@@ -1424,19 +1424,38 @@ typedef struct DECLSPEC_ALIGN(16) _CONTEXT {
     /* +0x380 */ DWORD64 Wvr[ARM64_MAX_WATCHPOINTS];
 
     /* +0x390 */ DWORD64 XStateFeaturesMask;
-
-    //
-    // Sve Registers
-    //
-    // TODO-SVE: Support Vector register sizes >128bit
-    // For 128bit, Z and V registers fully overlap, so there is no need to load/store both.
-    /* +0x398 */ DWORD Vl;
-    /* +0x39c */ DWORD Ffr;
-    /* +0x3a0 */ DWORD P[16];
-    /* +0x3e0 */
+    /* +0x3a0 */
 
 } CONTEXT, *PCONTEXT, *LPCONTEXT;
 
+// The SVE header immediately follows CONTEXT, when CONTEXT_XSTATE is set and
+// XStateFeaturesMask contains XSTATE_MASK_ARM64_SVE.
+// If CONTEXT_SVE_STATE_HEADER.VectorLengthInBytes != 0, it is immediately
+// followed by the serialized state of the vector/predicate register files,
+// and the first-faulting register, padded to 16-byte alignment. The bottom
+// 128 bits of each Z register are duplicated in CONTEXT::V in this design.
+//
+//  +------------------------------------------+
+//  |                 CONTEXT                  |
+//  +------------------------------------------+
+//  | CONTEXT_SVE_STATE_HEADER (16 bytes)      |
+//  +------------------------------------------+
+//  | Z0..Z31 (32 * VL bytes)                  |
+//  +------------------------------------------+
+//  | P0..P15 (16 * VL/8 bytes)                |
+//  +------------------------------------------+
+//  | FFR (VL/8 bytes)                         |
+//  +------------------------------------------+
+//  | padding to 16-byte alignment             |
+//  +------------------------------------------+
+//
+// TODO-SVE: We should update this layout to conform with Windows XSTATE.
+typedef struct DECLSPEC_ALIGN(16) _CONTEXT_SVE_STATE_HEADER
+{
+    DWORD VectorLengthInBytes;
+    DWORD Reserved[3];
+} CONTEXT_SVE_STATE_HEADER, *PCONTEXT_SVE_STATE_HEADER;
+
 //
 // Nonvolatile context pointer record.
 //

src/coreclr/pal/src/arch/arm64/asmconstants.h

@@ -105,35 +105,9 @@
 #define CONTEXT_DEBUG_SIZE   120 // (8*4)+(8*8)+(2*4)+(2*8)
 
 #define CONTEXT_XSTATEFEATURESMASK_OFFSET CONTEXT_DEBUG_OFFSET+CONTEXT_DEBUG_SIZE
+#define CONTEXT_Size         0x3a0
 
-// TODO-SVE: Support Vector register sizes >128bit
-
-#define CONTEXT_SVE_OFFSET   CONTEXT_XSTATEFEATURESMASK_OFFSET+8
-#define CONTEXT_VL_OFFSET    0
-
-// SVE register offsets are multiples of the vector length
-#define CONTEXT_SVE_REGS_OFFSET   CONTEXT_VL_OFFSET+4
-#define CONTEXT_FFR_VL       0
-#define CONTEXT_P0_VL        CONTEXT_FFR_VL+1
-#define CONTEXT_P1_VL        CONTEXT_P0_VL+1
-#define CONTEXT_P2_VL        CONTEXT_P1_VL+1
-#define CONTEXT_P3_VL        CONTEXT_P2_VL+1
-#define CONTEXT_P4_VL        CONTEXT_P3_VL+1
-#define CONTEXT_P5_VL        CONTEXT_P4_VL+1
-#define CONTEXT_P6_VL        CONTEXT_P5_VL+1
-#define CONTEXT_P7_VL        CONTEXT_P6_VL+1
-#define CONTEXT_P8_VL        CONTEXT_P7_VL+1
-#define CONTEXT_P9_VL        CONTEXT_P8_VL+1
-#define CONTEXT_P10_VL       CONTEXT_P9_VL+1
-#define CONTEXT_P11_VL       CONTEXT_P10_VL+1
-#define CONTEXT_P12_VL       CONTEXT_P11_VL+1
-#define CONTEXT_P13_VL       CONTEXT_P12_VL+1
-#define CONTEXT_P14_VL       CONTEXT_P13_VL+1
-#define CONTEXT_P15_VL       CONTEXT_P14_VL+1
-
-#define CONTEXT_SVE_REGS_SIZE     ((CONTEXT_P15_VL+1) * 4)
-#define CONTEXT_SVE_SIZE     CONTEXT_SVE_REGS_SIZE + 8
-
-#define CONTEXT_Size         CONTEXT_SVE_OFFSET + CONTEXT_SVE_SIZE
+#define CONTEXT_SVE_STATE_HEADER_VectorLengthInBytes 0
+#define CONTEXT_SVE_STATE_HEADER_Size                16
 
 #endif

src/coreclr/pal/src/arch/arm64/context2.S

@@ -25,13 +25,7 @@ LEAF_ENTRY CONTEXT_CaptureContext, _TEXT
     str x1, [sp, 24]
 
     ldr w1, [x0, CONTEXT_ContextFlags]
-    // clangs assembler doesn't seem to support the mov Wx, imm32 yet
-    movz w2, #0x40, lsl #16
-    movk w2, #0x1
-    mov w3, w2
-    and w2, w1, w2
-    cmp w2, w3
-    b.ne LOCAL_LABEL(Done_CONTEXT_CONTROL)
+    tbz w1, #CONTEXT_CONTROL_BIT, LOCAL_LABEL(Done_CONTEXT_CONTROL)
 
     // save the cpsr
     ldr x2, [sp, 24]
@@ -41,15 +35,7 @@ LEAF_ENTRY CONTEXT_CaptureContext, _TEXT
     stp x2, lr, [x0, CONTEXT_Sp]
 
 LOCAL_LABEL(Done_CONTEXT_CONTROL):
-    // we dont clobber x1 in the CONTEXT_CONTROL case
-    // ldr w1, [x0, CONTEXT_ContextFlags]
-    // clangs assembler doesn't seem to support the mov Wx, imm32 yet
-    movz w2, #0x40, lsl #16
-    movk w2, #0x2
-    mov w3, w2
-    and w2, w1, w2
-    cmp w2, w3
-    b.ne LOCAL_LABEL(Done_CONTEXT_INTEGER)
+    tbz w1, #CONTEXT_INTEGER_BIT, LOCAL_LABEL(Done_CONTEXT_INTEGER)
 
     ldp x1, x2,   [sp]
     ldr x3,       [sp, 16]
@@ -72,13 +58,7 @@ LOCAL_LABEL(Done_CONTEXT_CONTROL):
 
 LOCAL_LABEL(Done_CONTEXT_INTEGER):
     ldr w1, [x0, CONTEXT_ContextFlags]
-    // clangs assembler doesn't seem to support the mov Wx, imm32 yet
-    movz w2, #0x40, lsl #16
-    movk w2, #0x4
-    mov w3, w2
-    and w2, w1, w2
-    cmp w2, w3
-    b.ne LOCAL_LABEL(Done_CONTEXT_FLOATING_POINT)
+    tbz w1, #CONTEXT_FLOATING_POINT_BIT, LOCAL_LABEL(Done_CONTEXT_FLOATING_POINT)
 
     add x0, x0,   CONTEXT_NEON_OFFSET
     stp q0, q1,   [x0, CONTEXT_V0]
@@ -105,38 +85,66 @@ LOCAL_LABEL(Done_CONTEXT_INTEGER):
 
 LOCAL_LABEL(Done_CONTEXT_FLOATING_POINT):
     ldr w1, [x0, CONTEXT_ContextFlags]
-    // clangs assembler doesn't seem to support the mov Wx, imm32 yet
-    movz w2, #0x40, lsl #16
-    movk w2, #0x40
-    mov w3, w2
-    and w2, w1, w2
-    cmp w2, w3
-    b.ne LOCAL_LABEL(Done_CONTEXT_SVE)
+    tbz w1, #CONTEXT_XSTATE_BIT, LOCAL_LABEL(Done_CONTEXT_SVE)
 
     ldr x1, [x0, CONTEXT_XSTATEFEATURESMASK_OFFSET]
     tbz x1, #XSTATE_ARM64_SVE_BIT, LOCAL_LABEL(Done_CONTEXT_SVE)
 
-    add x0, x0,   CONTEXT_SVE_OFFSET
-    str p0, [x0, CONTEXT_P0_VL, MUL VL]
-    str p1, [x0, CONTEXT_P1_VL, MUL VL]
-    str p2, [x0, CONTEXT_P2_VL, MUL VL]
-    str p3, [x0, CONTEXT_P3_VL, MUL VL]
-    str p4, [x0, CONTEXT_P4_VL, MUL VL]
-    str p5, [x0, CONTEXT_P5_VL, MUL VL]
-    str p6, [x0, CONTEXT_P6_VL, MUL VL]
-    str p7, [x0, CONTEXT_P7_VL, MUL VL]
-    str p8, [x0, CONTEXT_P8_VL, MUL VL]
-    str p9, [x0, CONTEXT_P9_VL, MUL VL]
-    str p10, [x0, CONTEXT_P10_VL, MUL VL]
-    str p11, [x0, CONTEXT_P11_VL, MUL VL]
-    str p12, [x0, CONTEXT_P12_VL, MUL VL]
-    str p13, [x0, CONTEXT_P13_VL, MUL VL]
-    str p14, [x0, CONTEXT_P14_VL, MUL VL]
-    str p15, [x0, CONTEXT_P15_VL, MUL VL]
-    rdffr p0.b
-    str p0, [x0, CONTEXT_FFR_VL, MUL VL]
-    ldr p0, [x0, 0, MUL VL]
-    sub x0, x0,   CONTEXT_SVE_OFFSET
+    add x2, x0, CONTEXT_Size + CONTEXT_SVE_STATE_HEADER_Size
+    str z0, [x2, 0, MUL VL]
+    str z1, [x2, 1, MUL VL]
+    str z2, [x2, 2, MUL VL]
+    str z3, [x2, 3, MUL VL]
+    str z4, [x2, 4, MUL VL]
+    str z5, [x2, 5, MUL VL]
+    str z6, [x2, 6, MUL VL]
+    str z7, [x2, 7, MUL VL]
+    str z8, [x2, 8, MUL VL]
+    str z9, [x2, 9, MUL VL]
+    str z10, [x2, 10, MUL VL]
+    str z11, [x2, 11, MUL VL]
+    str z12, [x2, 12, MUL VL]
+    str z13, [x2, 13, MUL VL]
+    str z14, [x2, 14, MUL VL]
+    str z15, [x2, 15, MUL VL]
+    str z16, [x2, 16, MUL VL]
+    str z17, [x2, 17, MUL VL]
+    str z18, [x2, 18, MUL VL]
+    str z19, [x2, 19, MUL VL]
+    str z20, [x2, 20, MUL VL]
+    str z21, [x2, 21, MUL VL]
+    str z22, [x2, 22, MUL VL]
+    str z23, [x2, 23, MUL VL]
+    str z24, [x2, 24, MUL VL]
+    str z25, [x2, 25, MUL VL]
+    str z26, [x2, 26, MUL VL]
+    str z27, [x2, 27, MUL VL]
+    str z28, [x2, 28, MUL VL]
+    str z29, [x2, 29, MUL VL]
+    str z30, [x2, 30, MUL VL]
+    str z31, [x2, 31, MUL VL]
+    rdvl x3, #1
+    add x2, x2, x3, lsl #5
+
+    str p0, [x2, 0, MUL VL]
+    str p1, [x2, 1, MUL VL]
+    str p2, [x2, 2, MUL VL]
+    str p3, [x2, 3, MUL VL]
+    str p4, [x2, 4, MUL VL]
+    str p5, [x2, 5, MUL VL]
+    str p6, [x2, 6, MUL VL]
+    str p7, [x2, 7, MUL VL]
+    str p8, [x2, 8, MUL VL]
+    str p9, [x2, 9, MUL VL]
+    str p10, [x2, 10, MUL VL]
+    str p11, [x2, 11, MUL VL]
+    str p12, [x2, 12, MUL VL]
+    str p13, [x2, 13, MUL VL]
+    str p14, [x2, 14, MUL VL]
+    str p15, [x2, 15, MUL VL]
+    rdffr p15.b
+    str p15, [x2, 16, MUL VL]
+    ldr p15, [x2, 15, MUL VL]
 
 LOCAL_LABEL(Done_CONTEXT_SVE):
 
@@ -191,34 +199,6 @@ LOCAL_LABEL(Restore_CONTEXT_FLOATING_POINT):
     // since we potentially clobber x0 below, we'll bank it in x16
     mov x16, x0
 
-    ldr w17, [x16, CONTEXT_ContextFlags]
-    tbz w17, #CONTEXT_XSTATE_BIT, LOCAL_LABEL(No_Restore_CONTEXT_SVE)
-
-    ldr w17, [x16, CONTEXT_XSTATEFEATURESMASK_OFFSET]
-    tbz w17, #XSTATE_ARM64_SVE_BIT, LOCAL_LABEL(No_Restore_CONTEXT_SVE)
-
-    add x16, x16,   CONTEXT_SVE_OFFSET
-    ldr p0, [x16, CONTEXT_FFR_VL, MUL VL]
-    wrffr p0.b
-    ldr p0, [x16, CONTEXT_P0_VL, MUL VL]
-    ldr p1, [x16, CONTEXT_P1_VL, MUL VL]
-    ldr p2, [x16, CONTEXT_P2_VL, MUL VL]
-    ldr p3, [x16, CONTEXT_P3_VL, MUL VL]
-    ldr p4, [x16, CONTEXT_P4_VL, MUL VL]
-    ldr p5, [x16, CONTEXT_P5_VL, MUL VL]
-    ldr p6, [x16, CONTEXT_P6_VL, MUL VL]
-    ldr p7, [x16, CONTEXT_P7_VL, MUL VL]
-    ldr p8, [x16, CONTEXT_P8_VL, MUL VL]
-    ldr p9, [x16, CONTEXT_P9_VL, MUL VL]
-    ldr p10, [x16, CONTEXT_P10_VL, MUL VL]
-    ldr p11, [x16, CONTEXT_P11_VL, MUL VL]
-    ldr p12, [x16, CONTEXT_P12_VL, MUL VL]
-    ldr p13, [x16, CONTEXT_P13_VL, MUL VL]
-    ldr p14, [x16, CONTEXT_P14_VL, MUL VL]
-    ldr p15, [x16, CONTEXT_P15_VL, MUL VL]
-    sub x16, x16,   CONTEXT_SVE_OFFSET
-
-LOCAL_LABEL(No_Restore_CONTEXT_SVE):
     ldr w17, [x16, CONTEXT_ContextFlags]
     tbz w17, #CONTEXT_FLOATING_POINT_BIT, LOCAL_LABEL(No_Restore_CONTEXT_FLOATING_POINT)
 
@@ -246,6 +226,69 @@ LOCAL_LABEL(No_Restore_CONTEXT_SVE):
     sub x16, x16,   CONTEXT_FLOAT_CONTROL_OFFSET + CONTEXT_NEON_OFFSET
 
 LOCAL_LABEL(No_Restore_CONTEXT_FLOATING_POINT):
+    ldr w17, [x16, CONTEXT_ContextFlags]
+    tbz w17, #CONTEXT_XSTATE_BIT, LOCAL_LABEL(No_Restore_CONTEXT_SVE)
+
+    ldr x0, [x16, CONTEXT_XSTATEFEATURESMASK_OFFSET]
+    tbz x0, #XSTATE_ARM64_SVE_BIT, LOCAL_LABEL(No_Restore_CONTEXT_SVE)
+
+    add x1, x16, CONTEXT_Size + CONTEXT_SVE_STATE_HEADER_Size
+    ldr z0, [x1, 0, MUL VL]
+    ldr z1, [x1, 1, MUL VL]
+    ldr z2, [x1, 2, MUL VL]
+    ldr z3, [x1, 3, MUL VL]
+    ldr z4, [x1, 4, MUL VL]
+    ldr z5, [x1, 5, MUL VL]
+    ldr z6, [x1, 6, MUL VL]
+    ldr z7, [x1, 7, MUL VL]
+    ldr z8, [x1, 8, MUL VL]
+    ldr z9, [x1, 9, MUL VL]
+    ldr z10, [x1, 10, MUL VL]
+    ldr z11, [x1, 11, MUL VL]
+    ldr z12, [x1, 12, MUL VL]
+    ldr z13, [x1, 13, MUL VL]
+    ldr z14, [x1, 14, MUL VL]
+    ldr z15, [x1, 15, MUL VL]
+    ldr z16, [x1, 16, MUL VL]
+    ldr z17, [x1, 17, MUL VL]
+    ldr z18, [x1, 18, MUL VL]
+    ldr z19, [x1, 19, MUL VL]
+    ldr z20, [x1, 20, MUL VL]
+    ldr z21, [x1, 21, MUL VL]
+    ldr z22, [x1, 22, MUL VL]
+    ldr z23, [x1, 23, MUL VL]
+    ldr z24, [x1, 24, MUL VL]
+    ldr z25, [x1, 25, MUL VL]
+    ldr z26, [x1, 26, MUL VL]
+    ldr z27, [x1, 27, MUL VL]
+    ldr z28, [x1, 28, MUL VL]
+    ldr z29, [x1, 29, MUL VL]
+    ldr z30, [x1, 30, MUL VL]
+    ldr z31, [x1, 31, MUL VL]
+    rdvl x2, #1
+    add x1, x1, x2, lsl #5
+
+    ldr p0, [x1, 16, MUL VL]
+    wrffr p0.b
+    ldr p0, [x1, 0, MUL VL]
+    ldr p1, [x1, 1, MUL VL]
+    ldr p2, [x1, 2, MUL VL]
+    ldr p3, [x1, 3, MUL VL]
+    ldr p4, [x1, 4, MUL VL]
+    ldr p5, [x1, 5, MUL VL]
+    ldr p6, [x1, 6, MUL VL]
+    ldr p7, [x1, 7, MUL VL]
+    ldr p8, [x1, 8, MUL VL]
+    ldr p9, [x1, 9, MUL VL]
+    ldr p10, [x1, 10, MUL VL]
+    ldr p11, [x1, 11, MUL VL]
+    ldr p12, [x1, 12, MUL VL]
+    ldr p13, [x1, 13, MUL VL]
+    ldr p14, [x1, 14, MUL VL]
+    ldr p15, [x1, 15, MUL VL]
+
+LOCAL_LABEL(No_Restore_CONTEXT_SVE):
+    ldr w17, [x16, CONTEXT_ContextFlags]
     tbz w17, #CONTEXT_INTEGER_BIT, LOCAL_LABEL(No_Restore_CONTEXT_INTEGER)
 
     ldp x0, x1,   [x16, CONTEXT_X0]
@@ -295,4 +338,3 @@ LEAF_ENTRY RestoreCompleteContext, _TEXT
 LEAF_END RestoreCompleteContext, _TEXT
 
 #endif // __APPLE__
-

src/coreclr/pal/src/exception/signal.cpp

@@ -952,7 +952,7 @@ static void inject_activation_handler(int code, siginfo_t *siginfo, void *contex
 
         ULONG contextFlags = CONTEXT_CONTROL | CONTEXT_INTEGER | CONTEXT_FLOATING_POINT;
 
-#if defined(HOST_AMD64) || defined(HOST_ARM64)
+#if defined(HOST_AMD64)
         contextFlags |= CONTEXT_XSTATE;
 #endif
 
@@ -1142,7 +1142,7 @@ static bool common_signal_handler(int code, siginfo_t *siginfo, void *sigcontext
 
     ULONG contextFlags = CONTEXT_CONTROL | CONTEXT_INTEGER | CONTEXT_FLOATING_POINT;
 
-#if defined(HOST_AMD64) || defined(HOST_ARM64)
+#if defined(HOST_AMD64)
     contextFlags |= CONTEXT_XSTATE;
 #endif